PCI-SIG, the organization responsible for PCIe standards worldwide, officially announces the release of PCIe 6.0 specification, with the ability to achieve 64 GT/s.
PCI-SIG launches PCIe 6.0 Specification to deliver exceptional performance to high-processing data applications
Features of the PCIe 6.0 Specification
- 64 GT/s raw data rate and up to 256 GB/s via x16 configuration
- Pulse Amplitude Modulation with 4 levels (PAM4) signaling and leverages existing PAM4 already available in the industry
- Lightweight Forward Error Correct (FEC) and Cyclic Redundancy Check (CRC) mitigate the bit error rate increase associated with PAM4 signaling
- Flit (flow control unit) based encoding supports PAM4 modulation and enables more than double the bandwidth gain
- Updated Packet layout used in Flit Mode to provide additional functionality and simplify processing
- Maintains backward compatibility with all previous generations of PCIe technology
This new breakthrough in PCIe technology will allow for two times the power efficiency and bandwidth of the previous PCIe 5.0 specification (which only allowed for as high as 32 GT/s), and still provide lower latency levels and a minimized overhead for bandwidth. PCIe has been the number one factor in performance and processing data for the last two decades.
PCI-SIG is pleased to announce the release of the PCIe 6.0 specification less than three years after the PCIe 5.0 specification. PCIe 6.0 technology is the cost-effective and scalable interconnect solution that will continue to impact data-intensive markets like data center, artificial intelligence/machine learning, HPC, automotive, IoT, and military/aerospace, while also protecting industry investments by maintaining backwards compatibility with all previous generations of PCIe technology.
— Al Yanes, PCI-SIG Chairperson and President
The PCIe 6.0 specification will offer support for heavy data transfer markets, such as data centers, AI and machine learning, HPC, automotive, IoT, and military aerospace. The new technology includes servers, AI/ML, networking, and storage in data-intensive markets. PCIe 6.0 supports data rates of 64 GT/s and as high as 256 GB/s utilizing an x16 configuration, providing low latency, reduced complexity, and minimal overhead bandwidth.
The new specification will introduce PAM4 (Pulse Amplitude Modulation with 4 levels) signaling, low-latency Forward Error Correction (FEC), and Flit (Flow Control Unit)-based encoding. This allows for the technology to be cost-effective and scalable. Companies will be able to future-proof their products, offering consumers high bandwidth and low latency technology.
PAM4, or Pulse Amplitude Modulation with 4 Levels, is a multilevel signal modulation format used to transmit data. The previous NRZ technology that was used only offered two levels of signaling. It packs two bits of information comparable to NRZ technology on a serial channel. Using PAM4 will allow for the PCIe 6.0 specification to reach 64 GT/s data rate and up to 256 GB/s bidirectional bandwidth via an x16 configuration.
Flit, or Flow Control Unit mode, is the unit of data exchange in PCIe 6.0 technology. The organization adopted a 256-Byte Flit structure, including the variable-sized Transaction Layer Packets (TLPs) and Data Link Layer Payloads (DLLPs). This was an important change due to the move to PAM4 encoding and Forward Error Correction, or FEC, which only focuses on fixed-size data packets.
With the PCI Express SSD market forecasted to grow at a CAGR of 40% to over 800 exabytes by 2025, PCI-SIG continues to meet the future needs of storage applications. With the storage industry transitioning to PCIe 4.0 technology and on the cusp of introducing PCIe 5.0 technology, companies will begin adopting PCIe 6.0 technology in their roadmaps to future-proof their products and take advantage of the high bandwidth and low latency that PCI Express technology offers.
— Greg Wong, Founder and Principal Analyst, Forward Insights.
There is a growing demand for ever-increasing performance in many segments in the data center such as high-performance computing and AI. Within three to five years the application landscape will look very different and companies will likely begin updating their roadmaps accordingly. The advancement of an established standard like PCIe 6.0 architecture will serve the industry well in establishing composable infrastructure for performance intensive computing use cases.
— Ashish Nadkarni, Group Vice President, Infrastructure Systems, Platforms and Technologies Group, IDC